Mark Poliks DL Bio
Email: mpoliks@binghamton.edu
Topics: Materials and Processes, Advanced Manufacturing, Flexible Hybrid Electronics, High Speed and Additive
MARK POLIKS (M: 2004) is Empire Innovation Professor of Engineering, Professor of Systems Science and Industrial Engineering, Professor of Materials Science and Engineering and Director of the Center for Advanced Microelectronics Manufacturing (CAMM) at the State University of New York at Binghamton. In 2006 he established the first research center (CAMM), to explore the application of roll-to-roll processing methods to flexible electronics and displays, with equipment funding from the United States Display Consortium (USDC) and the Army Research Lab. His research is in the areas of industry relevant topics that include: high performance electronics packaging, flexible hybrid electronics, medical and industrial sensors, materials, processing, aerosol jet printing, roll-to-roll manufacturing, in-line quality control and reliability. He has received more than $20M in research funding from Federal, New York State and corporate sources and more than $30M in equipment funding from federal and state sources. He is the recipient of the SUNY Chancellor’s Award for Excellence in Research. He leads the New York State Node of the DoD NextFlex Manufacturing USA and was named a 2017 NextFlex Fellow. He has authored more than one-hundred technical papers and holds forty-six US patents. Previously he held senior technical management positions at IBM Microelectronics and Endicott Interconnect. Poliks is a member of technical councils for the FlexTech Alliance, NBMC and NextFlex, and on the NextFlex Governing Council. He is an active member of the IEEE Electronics Packaging Society Electronic Component and Technology Conference and served and the 69th ECTC General Chair. Poliks received dual undergraduate degrees, with honors, in chemistry and mathematics from the University of Massachusetts and a Ph.D. from the University of Connecticut in materials science and engineering. He was a McDonnell-Douglas post-doctoral fellow working on solid-state magnetic resonance at Washington University, St. Louis before starting his career at IBM.
Ravi Mahajan DL Bio
Email: ravi.v.mahajan@intel.com
Topics: Advanced Packaging Architectures, Assembly Processes and Thermal Management
RAVI MAHAJAN is an Intel Fellow and the Director of Pathfinding for Assembly and Packaging technologies for 7-nanometer (7nm) silicon and beyond in the Technology and Manufacturing Group at Intel Corporation. He is responsible for planning and carrying out multi-chip package pathfinding programs for the latest Intel process technologies. Ravi also represents Intel in academia through research advisory boards, conference leadership and participation in various student initiatives.
Ravi has led efforts to define and set strategic direction for package architecture, technologies and assembly processes at Intel since joining the company’s Assembly and Test Technology Development organization in 2000, spanning 90nm, 65nm, 45nm, 32nm, 22nm and 7nm silicon. Earlier in his Intel career, he spent five years as group manager for thermal mechanical tools and analysis. In that role, Mahajan oversaw a Thermal-Mechanical Lab chartered with delivering detailed thermal and mechanical characterization of Intel’s packaging solutions for current and future processors.
A prolific inventor and recognized expert in microelectronics packaging technologies, Mahajan holds more than 40 patents, including the original patent for a silicon bridge that became the foundation for Intel’s Embedded Multi-Die Interconnect Bridge technology currently deployed in high volume manufacturing for FPGAs and graphics parts. His early insights also led to high-performance, cost-effective cooling solutions for high-end microprocessors and the proliferation of photo-mechanics techniques used for thermo-mechanical stress model validation. Ravi has written several book chapters and more than 30 papers on topics related to his area of expertise.
Ravi joined Intel in 1992 after earning a bachelor’s degree from Bombay University, a master’s degree from the University of Houston, and a Ph.D. from Lehigh University, all in mechanical engineering. His contributions during his Intel career have earned him numerous industry honors, including the SRC’s 2015 Mahboob Khan Outstanding Industry Liaison Award, the 2016 THERMI Award from SEMITHERM, the 2016 Allan Kraus Thermal Management Medal & the 2018 InterPACK Achievement award from ASME and IEEE 2019 “Outstanding Service and Leadership to the IEEE” Award for both the Phoenix Section & IEEE Region 6. He is an IEEE EPS Distinguished Lecturer. He is one of the founding editors for the Intel Assembly and Test Technology Journal (IATTJ) and currently VP of Publications & Managing Editor-in-Chief of the IEEE Transactions of the CPMT. Additionally he has been long associated with ASME’s InterPACK conference and was Conference Co-Chair of the 2017 Conference. Ravi is a Fellow of two leading societies, ASME and IEEE. He was named an Intel Fellow in 2017.
Karlheinz Bock DL Bio
Email: karlheinz.bock@tu-dresden.de
Topics: Multifunctionality & heterosystemintegration & additive manufacturing (IoT, Industry 4.0, tactile internet), packaging for mechanical, digital and power co-integration (automotive, machines, robots..),2.5D and 3D electro-optical-RF interposer and board (high performance), heterointegration for flexible, bio, organic and large area electronics (open form factor)
KARLHEINZ BOCK (M’96)since 2014 has served as Professor and chair of electronics packaging and director of the institute of electronics packaging (IAVT) at the TU Dresden. Since 2008 he has served as a Professor of Polytronic Microsystems at the faculty of Communication and Electronics Engineering at the University of Berlin. He earned his Diploma on electrical and communication engineering from the University of Saarbrücken, Germany in 1986 and his Dr.-Ing. (Ph.D.) for RF microelectronics from the University of Darmstadt, Darmstadt, Germany in 1994. From 1996 to 1999 he worked in the materials packaging and reliability department of IMEC vzw. in Leuven Belgium. He received the “Japan Society for Promotion of Science (JSPS) Award” in 1994 for his PhD thesis and worked as post-doc from 1994 to 1995 at the Tohoku University in Sendai, Japan. He received two Doctor honoris causa, in 2012 from the Polytechnical University of Bukarest in Romania for his work on organic and flexible electronics and heterointegration and in 2019 from the Sikorsky-Polytechnical University of Kiew, Ukraine for his work in electronics packaging. Since 2017 he serves as a vice dean and since 2021 he serves as the dean of the faculty of electronics engineering and information sciences at the TU Dresden as well as in the rector of the TU Dresdens advisory boards for research and managing diversity as well as in the TU Dresden commission for environmental sustainability.
He served in the Fraunhofer Gesellschaft, from 2001 until 2014 where he has been employed as head of the Polytronic and Multifunctional Systems department at the Fraunhofer Institute for Reliability and Microintegration (IZM, Munich branch, from 2010 named EMFT) and as deputy director from 2006 until 2010 of IZM and from 2010 until 2012 as acting director of Fraunhofer EMFT.
Karlheinz Bock has contributed more than 300 publications and more than 20 patents. He co-authored 16 best paper awards. (see Google Scholar and Research Gate) He is engaged in developing the technological community of 3D systems, heterosystem integration and packaging and organic and flexible electronics, advanced packaging and reliability. He serves on the emerging technology TPC of IEEE ECTC since 2008, as sub-committee member and vice chair 2011 and chair 2012; as member of IEEE IEDM since 2008 on TPC for display sensors MEMS (DSM) and as chair of DSM TPC in 2010; as the European arrangements co-chair 2011, chair 2012 of IEEE IEDM executive committee; furthermore he served on the IEEE ESTC conference technical program committee since 2012; 2016 he has served as the program chair of IEEE ESTC 2016 and as the general chair of IEEE ESTC 2018. Since 2015-2018 he served as vice chair and from 2018-2020 as chair of the technical committee of emerging technologies of the IEEE EPS. Since 2020 he serves on the IEEE EPS ECTC executive committee and as a program chair of IEEE ECTC 2022 and at present as the vice general chair of ECTC2023. Since 2014-2018 and re-elected from 2020 he serves on the board of governors BoG of IEEE EPS for region 8.
Pradeep Lall DL Bio
Email: lallpra@auburn.edu
Topics: Semiconductor Packaging, Modeling and Simulation, Reliability in Harsh Environments, Shock/Drop/Vibration, Cu Wirebonding, Flexible Hybrid Electronics, Additive Manufacturing, Prognostics and Health Management, LEDs, Micro CT Measurements
PRADEEP LALL (M:1990, SM: 2008, F: 2012) is the MacFarlane Endowed Professor in the Department of Mechanical Engineering and the Director of NSF Center for Advanced Vehicle and Extreme Environment Electronics at Auburn University. He serves on the Technical Council and Governing Council of NextFlex Manufacturing Institute. Dr. Lall is author and co-author of 2-books, 14 book chapters, and over 500 journal and conference papers in the field of electronics reliability, safety, energy efficiency, and survivability. Dr. Lall, a fellow of IEEE, fellow of the ASME, and fellow of the Alabama Academy of Sciences. Dr. Lall is recipient of the NSF’s Alex Schwarzkopf Award for Technology Innovation, Alabama Academy of Science Wright A, Gardner Award, IEEE Exceptional Technical Achievement Award, ASME-EPPD Applied Mechanics Award, SMTA’s Member of Technical Distinction Award, Auburn University’s Creative Research and Scholarship Award, SEC Faculty Achievement Award, Samuel Ginn College of Engineering Senior Faculty Research Award, Three-Motorola Outstanding Innovation Awards, Five-Motorola Engineering Awards, and Twenty Best-Paper Awards at national and international conferences. Dr. Lall has served in several distinguished roles at national and international level including serving as member of National Academies Committee on Electronic Vehicle Controls, Member of the IEEE Reliability Society AdCom, IEEE Reliability Society Representative on the IEEE-USA Government Relations Council for R&D Policy, Chair of Congress Steering Committee for the ASME Congress, Member of the technical committee of the European Simulation Conference EuroSIME, and Associate Editor for the IEEE Transactions on Components and Packaging Technologies. He received the M.S. and Ph.D. degrees in Mechanical Engineering from the University of Maryland and the M.B.A. from the Kellogg School of Management at Northwestern University.
Eric Perfecto DL Bio
Email: Eric.Perfecto1@ibm.com
Topics:Fine pitch interconnect, chip to chip and chip to laminate connection, UBM and solder selection, chip package interaction and 2.5D fabrication
ERIC PERFECTO (M’95, SM’01, F’17) has extensive experience working in microelectronics. At IBM, Eric has led the development of multi-level Cu-polyimide advanced packages for high-end systems, followed by the introduction of Pb-free solder interconnects and 2.5D wafer finishing. As part of the IBM Microelectronics Division divestiture, Eric moved to GLOBALFOUNDRIES where he established a Si Photonics packaging development line. In 2019 he returned to IBM part time to establish a heterogeneous integration line in Albany. He holds a M.S. in Chemical Engineering from the University of Illinois and a M.S. in Operations Research from Union College.
An author of more than 80 technical papers and three book chapters, Eric received two Best Conference Paper Awards (2006 ESTC and 2008 ICEPT-HDP) and the 1994 Prize Paper Award from CPMT Trans. on Adv. Packaging. He holds 55 US patents and has been honored with two IBM Outstanding Technical Achievement Awards.
Eric served as the 57th ECTC General Chair, the 55th ECTC Program Chair and is the current ECTC Publicity chair. For the last 12 years, Eric’s popular Flip Chip Fabrication and Interconnection course has been given at ECTC to great reviews. He is an EPS Distinguish Lecturer, an IEEE Fellow, and has achieved IMAPS and SPE senior membership.
Eric has represented the EPS members previously, elected 4 times to the BoG. For 3 years he served as the EPS Strategic Director of Global Chapters and Membership where he focused on enhancing the EPS membership value. Through his efforts, the CPMT Transactions are now part of the EPS membership. For 8 years, he was the EPS Awards Program Director responsible for the EPS Mayor Awards, the Regional Awards, the PhD Fellowship, the ECTC Student Travel Awards and the ECTC Volunteer Award. Currently, he chairs the EPS Field Award committee. At a local level, Eric is the membership Chair of the Mid-Hudson IEEE Section and founding member of the EPS Mid-Hudson EPS Chapter where he serves as membership chair.