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IEEE CPMT Webinar: Interconnect Materials in Electronic Packaging

Date
2016-08-10
Location
Webinar - Online
Contact
Marsha Tickman – m.tickman@ieee.org
Presenter
Kwang-Lung Lin
Description

Earn 1 Professional Development Hour (PDH) for completing the webinar - Complete Form​

Electronic packaging comprises combination of hybrid compartments including silicon chip, encapsulation, substrate, lead frame, printed circuit board, etc. The enclosure of all of these compartments need appropriate interconnects (I/O) to enable the functions of the electronic products. The interconnect technologies and materials adopted depend on the level of packaging. This presentation will go through the interconnect materials for the chip level, module level, and board level packaging. The interconnect materials and technologies to be discussed include wire bonding, solder bumping, copper pillar, TSV, solder ball, solder paste, and wave soldering.

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Event Recording