Graduate/Undergraduate Student Resources
Student Competitions at Conferences
- ITherm 2023 Heat Sink Competition
- University Level Education Activities in Electronics Packaging - Present and Future (ESTC 2022)
Electronic packaging comprises combination of hybrid compartments including silicon chip, encapsulation, substrate, lead frame, printed circuit board, etc. The enclosure of all of these compartments need appropriate interconnects (I/O) to enable the functions of the electronic products. The interconnect technologies and materials adopted depend on the level of packaging. This presentation will go through the interconnect materials for the chip level, module level, and board level packaging. The interconnect materials and technologies to be discussed include wire bonding, solder bumping, copper pillar, TSV, solder ball, solder paste, and wave soldering.
EPS Student Travel Awards