Graduate/Undergraduate Student Resources


Technical Material

Electronic packaging comprises combination of hybrid compartments including silicon chip, encapsulation, substrate, lead frame, printed circuit board, etc. The enclosure of all of these compartments need appropriate interconnects (I/O) to enable the functions of the electronic products. The interconnect technologies and materials adopted depend on the level of packaging. This presentation will go through the interconnect materials for the chip level, module level, and board level packaging. The interconnect materials and technologies to be discussed include wire bonding, solder bumping, copper pillar, TSV, solder ball, solder paste, and wave soldering.


EPS ECTC Student Travel Award

Past Recipients


Luca Del Carro, ETH Zurich
Normand-Pierre Goodhue, Université de Sherbrooke
Siva Chandra Jangam, University of California, Los Angeles
Chenhui Li, Eindhoven University of Technology
Tong-Hong Lin, Georgia Institute of Technology
Nivesh Mangal, Ghent University
Saikat Mondal, Michigan State University
Bo Song, Georgia Institute of Technology


Jiawei Marvin Chan, Nanyang Technological University
Luca Del Carro, ETH Zurich
Alexander Hanss, Technische Hochschule Ingolstadt
Chenhui Li, Eindhoven University of Technology
Junjie Li, Huazhong University of Science and Technology
Muhammad Amin Saleem, Smoltek AB
Ninad Shahane, Georgia Institute of Technology
Divya Taneja, CEA-LETI


Sarkis Babikian, University of California, Irvine
Ossama El Bouayadi, CEA-LETI
Masaki Ohyama, Waseda University
Yu-Sheng Hsieh, National Chiao Tung University
Jonas Zürcher, IBM Research 
Bo Song, Georgia Institute of Technology
Xiao Hu, City University of Hong Kong
Aliaksei Aliaksei, University of Rome La Sapienza