Patrick McCluskey, EPS Power & Energy Technical Committee Chair

Heterogeneous integration (HI) is not possible without a source of power for the multiple devices and components involved.  While it is possible to supply this power externally to one or more devices, it is typically advantageous to integrate the conversion and distribution of this power into the HI system.  This makes power delivery one of the most critical elements in an HI system.   HI also provides significant advantages for power electronics as it permits wide bandgap power devices, which surpass silicon in power handling capability, efficiency, and operating temperature, to be integrated with silicon control, logic, and memory devices and with lower operating temperature passive devices.  Nevertheless, HI of power electronics comes with a raft of challenges for SiP designers, as the power electronics require space, generate heat, and can cause electrical noise in the circuits.

Download HIR Chapter 10: Integrated Power Electronics

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Yasumitsu Orii, High Density Substrates and Boards TC Chair

The High Density Substrates Boards technical committee (TC-6) of the Electronics Packaging Society EPS is focusing on high-speed and high-density interconnect technologies, based on advanced material-, process-, structure-, and design-technologies. Application areas are ICTs, mobile electronics, automobiles/power electronics, and healthcare. High density substrates and boards are the key components placed in the center of the equipment and always need to be evolved correspondingly to the cutting edge technologies in electrical, optical, and thermal fields.

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The IEEE SA is considering forming a Pre-standards Reusable Electronics Packaging Activity under the 
IEEE SA Industry Connections Program to explore development of standards and guidelines for reusable electronics packaging.  The IEEE SA Industry Connections Program provides a neutral environment where individuals, entities, partners, and competitors can come together and work on shared problems. Pre-standards Activities explore whether sufficient interest and resources exist to develop a standard and if so draft a proposal for an IEEE standards project. The Pre-standards Activity will address the following:   

·Potential market acceptance of the standards project, including technical feasibility

·Relationship to related standards, if known, including its distinct identity from other projects

·Viable leadership and participation

·Realistic scope and objectives

If you would like to participate in this project, or want to learn more about it, please contact Joan Woolery at j.woolery@ieee.org 

As a valued member of the IEEE Electronics Packaging Society, I invite you to read the most recent articles and consider submitting your own work and research to the new topical Section dedicated to electronics packaging in IEEE Access – a fully open access journal.

The Electronics Packaging Section within IEEE Access is dedicated to publishing high-quality, peer-reviewed articles in the broad area of electronics packaging which covers the scientific, engineering, and production aspects of materials, components, modules, hybrids and micro-electronic systems for all electronic applications, which includes technology, selection, modeling/simulation, characterization, assembly, interconnection, packaging, handling, thermal management, reliability, testing/control of the above as applied in design and manufacturing. Examples include optoelectronics and bioelectronic systems packaging, and adaptation for operation in severe/harsh environments. Emphasis is on research, analysis, development, application and manufacturing technology that advance state-of-the-art within this scope. 

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In response to the COVID-19 situation, ESTC 2020 has moved to a 100% virtual platform, and the conference will be carried out live! The live format will allow interaction similar to an in-person conference. The digital format will give new possibilities, such as recording of presentations allowing to catch up presentations in parallel sessions. Heterogeneous Integration Roadmap (HIR) workshop, hosted by ESTC, will be held September 15, 9:00 am – 11:50 am Central European Summer Time. The HIR workshop will be open to the general public and is free.

Please view the ESTC 2020 technical program as well as the virtual HIR Workshop at ESTC

We invite you to register now for ESTChttps://www.estc-conference.net/estc-2020/registration-1

Access to the HIR Workshop will be free of charge, and available through a Zoom weblink at https://www.estc-conference.net/estc-2020/hir-workshop 

Attendees are advised to download the Zoom client (free of charge) prior to the HIR workshop: https://zoom.us/support/download .