The Soft Error Rate (SER) Workshop

Materials Impurities and Logic/Memory Errors: Join us on 24 October for the worldwide 10th EPS Soft Error Rate Workshop (no cost: in person or via full-day webinar). As packaging is developed for denser ICs and 2.5 and 3D, minor radioactive impurities can have a larger effect on system integrity. Presenters from IBM, Xilinx, Los Alamos Nat’l Lab, HPE, Stanford, Vanderbilt, SpaceX, Cypress Semi, Nvidia, STMicro and others will discuss issues, metrology, and use cases. Download past slides and view past presentations of interest.

For more information and to register:http://www.cpmt.org/scv/?p=679