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Date

Thursday, February 22nd, 2018
8:30 am to 6:00 pm

Plenary: Dr. Nicky Lu

 

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Attendee Registration Fee

$40 IEEE members, students, retired, unemployed,

$50 non-members

Add $10 more after Feb. 9th 

 

Location

Texas Instruments Auditorium

Building E Conference Center,

2900 Semiconductor Drive,

Santa Clara, California, USA

 

Full Program and Details

A Moore's Law for Packaging

Date and Time:  March 21, 2018 11:00 AM EST

Presenter: Subramanian Iyer

Host: Alan Huffman

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Abstract:

While Silicon has scaled aggressively by over a factor of a few thousand over the last six decades the progress in packaging has been more modest – a linear factor 4-5 in most cases. In this talk, we will examine the reasons for this lag and what we are doing to fix this imbalance.  Packaging is undergoing a renaissance where chip-to-chip interconnects can approach the densities of on-chip interconnects. We will discuss the technologies that are making this happen and how these can change our thinking on architecture and future manufacturing. Specifically, we will discuss two embodiments: Silicon as the next generation packaging substrate, and Flexible electronics using fan-out wafer level processing. Finally, we’ll discuss how these developments can help put some intelligence into Artificial Intelligence and bring about changes in Medical Engineering.

 

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