Upcoming HIR Workshop

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IEEE Heterogeneous Integration Roadmap (HIR) Symposium

2nd Annual, intro to HIR v1.0, overviews, integration, working groups, participation …

HIR v1.0 Roadmap Release

Co-hosted by EPS Santa Clara Chapter & SEMI

When: February 21 - 22, 2019

Where: SEMI Headquarters, 673 South Milpitas Blvd, Milpitas, CA

Cost: $25 IEEE/ASME members, students, unemployed; $40 non-members. ($10 more after Feb. 10th) (includes lunch)

Registration waived for HIR Technical Working Group (TWG) members

Register Now


Thursday, February 21, 2019: HIR Symposium

Time: 8:30 AM – 6:00 PM

Who Should Attend: Open to the General Public

Speakers: Chairs of Working Groups (from Intel, Boeing, Fraunhofer, NASA, Infineon, Google, Advantest, StatsChipPaC, Dow, ASE, ITRI, SEMI, more)

Friday, February 22, 2019: HIR Technical Working Meeting and Open House

Time: 8:30 AM – 4:00 PM

Who Should Attend: All HIR Technical Working Group members and anyone interested in participating or learning more about the Heterogeneous Integration Roadmap.

The purpose is to provide a forum for interaction, collaboration and feedback.


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