3rd Annual Heterogeneous Integration Roadmap (HIR) Meeting & Symposium


Co-hosted by IEEE EPS, EPS Santa Clara Valley Chapter & SEMI

When: February 20 - 21, 2020

Where: SEMI Headquarters, 673 South Milpitas Blvd, Milpitas, CA USA

Register Here

Thursday, February 20, 2020: HIR Symposium

Time: 8:30 AM – 6:00 PM

Who Should Attend: Open to the General Public

Plenary Speakers and Technical Working Group Representatives (from Intel, Boeing, Fraunhofer, NASA, Infineon, Google, Advantest, ASE, ITRI, SEMI, UI-UC, U-Md, UCLA, more)

Friday, February 21, 2020: HIR Technical Working Meeting and Open House

Time: 8:30 AM – 4:00 PM

Who Should Attend: All HIR Technical Working Group members and anyone interested in participating or learning more about the Heterogeneous Integration Roadmap.

The purpose is to provide a structured forum for interaction, collaboration and feedback.

Read More