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Term 1 January 2022 through 31 December 2024

NOMINATION DEADLINE:  14 June 2021

The EPS Board of Governors (BoG) includes 19 Members-at-Large, elected by the full voting membership of the Society. Six Members at Large will be selected each year to represent the regional composition of the Society membership.

Regional Members-at-Large are elected to achieve totals proportionate to the geographic distribution of EPS members. Any IEEE Region/grouping of Regions determined to have at least 10% of total EPS members will have the proportional number of Member-at-Large positions designated to it for representation on the BoG.  The slate of candidates for each year’s election will be constructed to ensure that the resulting total of newly elected Members-at-Large and continuing Members-at-Large, respectively, has the proper proportion of representatives from each Region/grouping of Regions. Each Region/grouping of Regions will have a separate slate of candidates from that Region. Voting members will elect members-at-large from within their Region only (that is, members in Regions 1-7 & 9 vote for Members-at-Large from Regions 1-7 & 9, members in Region 10 vote for Members-at-Large from Region 10).

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Heterogeneous Integration Roadmap (HIR), released October 2019, is a roadmap to the future of electronics identifying technology requirements and potential solutions. The primary objective is to stimulate pre-competitive collaboration between industry, academia and government to accelerate progress. The roadmap offers professionals, industry, academia and research institutes a comprehensive, strategic forecast of technology over the next 15 years. The HIR also delivers a 25-year projection for heterogeneous integration of Emerging Research Devices and Emerging Research Materials with longer research-and-development timelines. 

The workshop content will be available on demand and is open to everyone. The purpose of the HIR workshop is to broaden the proliferation of the roadmap content to the virtual participants for dialogue and feedback for inclusion into the 2021 edition. 

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There will also be two live Panel Sessions: "Rising to the Chiplet Challenge" on June 2nd and "Test in Heterogeneous Integration" on June 4th. These panels are included with ECTC registration.

Title: Green Electronics – Our Required Contribution to Global Environmental Goals

Date: May 18,, 2021

Time: 4:00 – 4:45 PM CET

Presenter: Nils Nissen

Abstract: More and more companies are setting climate neutrality goals, and countries and regions have been strengthening their commitments over the last weeks. While the electronics industry is not among the biggest contributors to climate relevant emissions, we have to drastically improve within the industry, while at the same time help other sectors to decarbonize. The goals set by companies trickle up the supply chain and now affect more suppliers of components, and indeed the development of new technologies.

More information including Registration

Title: Avoiding Inelastic Strains in Solder Joint Interconnections of IC Packages

Date: May 19, 2021

Time: 2:30 – 4:00 PM EDT/ 11:30 AM – 1:00 PM PDT

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Abstract: The following three practically important questions associated with predicting and improving the reliability of solder joint interconnections (SJI) of IC packages are addressed: 1) Could inelastic strains in the solder material be avoided by a rational design, and if not, could the sizes of the inelastic strain areas be predicted and , if possible, minimized? 2) Considering that the difference between an highly reliable and an insufficiently reliable product is “merely” in the level of its never-zero probability of failure, and that SJIs are usually the most vulnerable structural elements in an IC package design, could this probability be assessed  at the design stage and, if possible, made adequate for the given application? 3) Should temperature cycling accelerated testing for SJIs be replaced with a more physically meaningful, less costly, less time- and labor- consuming and, most importantly, less misleading accelerated test vehicle? The general concepts are illustrated by practical numerical examples.

We are delighted to announce the establishment of a new EPS Chapter in Region 5. At the core of our motivation is the continued support, advancement, and fulfillment of the IEEE EPS mission. As this is one of the largest IEEE Regions in the United States, we were enthusiastically driven, in seizing this opportunity, to establish a new Chapter. We are fortunate to be geographically and strategically located in one of the most prosperous and growing technology hubs in the US, fueled by the region's leading academic institutions, research establishments, and technological enterprises or companies, including semiconductor corporations involved in IC packaging assembly and test.

Our Chapter's purpose shall be scientific, literary, and educational. We will facilitate Society members with valuable opportunities to network at a local level and enabling their personal and professional growth. Members will have the opportunity to attend technical presentations, create solid peer-to-peer connections, and participate in leadership to make a positive distinction and differentiation in their jobs and careers. Additionally, we hope to increase student membership and overall awareness of electronic packaging technology for young engineers and scientists. 

We are looking forward to collaborating with other chapters and organizations in the continued support, advancement, and fulfillment of the IEEE EPS mission. You can reach out to us and keep updated on our activities at our IEEE EPS Dallas webpage at https://r5.ieee.org/dallas-eps/.

 

Rajen Murugan, PhD

IEEE Senior Member 

Abstract— Over the last decades, we have seen an increased need for flexible hybrid electronics (FHE) especially in the mobile, wearable, and medical devices. Recently additional applications and technologies have emerged e.g. stretchable and conformable electronics. 3D and foldable smart devices enable novel applications with new levels of user convenience and human-machine interfaces.

The range of processes and materials applied in products and research has become very broad. Various types of flexible and stretchable base materials are available with different thermal, electrical and mechanical properties. They have to match the requirements of subsequent processes and those of the final application. Besides photolithographic processes novel flexible and stretchable electrical circuits are realized by different printing technologies using conductive polymers, percolation networks or liquid metals. Alternatively, higher densities can be achieved by photolithographic structuring of meander-shaped or buckling conductors or fine meshes. The modules can finally be dynamically flexible or stretchable or they can be brought in 3D shapes by 3D printing, thermoforming, or injection molding to generate smart 3D surfaces and structures.

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The 23rd IEEE Electronics Packaging Technology Conference (EPTC2021) is an international event organized by the IEEE RS/EPS/EDS Singapore Chapters and co-sponsored by IEEE Electronics Packaging Society (EPS). EPTC2021 conference will feature keynotes, technical sessions, technology talks, exhibition corners and networking activities. It aims to provide a platform to cover the technology developments in the complete spectrum of electronics packaging from design to manufacturing. Since its inauguration in 1997, EPTC has established a highly reputed electronics packaging conference in Asia and selected as an EPS flagship conference in the Asia-Pacific Region 10, covering diverse   reas of electronic packaging technology topics. These include modules, components, materials, equipment technology, assembly, reliability, interconnect design, device and systems packaging, heterogeneous integration, wafer-level packaging, flexible electronics, LED, Internet of things (IOT), 5G, autonomous vehicles, photonics, emerging technologies, 2.5D/3D integration technology and, smart manufacturing.

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Dear Microelectronics Professional,

The next European Microelectronics and Packaging Conference (EMPC2021) will be organised and hosted by IMAPS Nordic. EMPC2021 will be held Online from 13th to 16th September 2021. 

This will be an important step in rebuilding the electronics business at the exit from the pandemic and provides an excellent opportunity for you and the microelectronics engineering community to meet a focused European and international customer base.

Please check out http://empc2021.org/conference/sponsorship-exhibitor-invitation/ for more information. This is an excellent opportunity for suppliers and manufacturers to participate in this leading event in Europe.

Additional opportunities are available to increase your influence by sponsorship of EMPC-2021. 

We look forward to your involvement and to greeting you Online!

Paul Collander

paul.collander@imapsnordic.org

Exhibition Chair

Dear Colleagues,

IEEE COMCAS 2021, The International Conference on Microwaves, Communications, Antennas, Biomedical Engineering & Electronic Systems will be held on November 1-3, 2021 in Tel Aviv, Israel.

IEEE COMCAS is one of the world leading IEEE conferences, and we expect to welcome Scientists, Engineers, Managers, and Researchers (from academia, industry and government institutions) from all over the world.
In 2021 the International IEEE COMCAS will continue to evolve and provide an advanced multidisciplinary forum for the exchange of ideas, research results, and industry experience in a range of key areas i.e., communications and sensors, antennas, biomedical engineering, RF and Microwave devices and circuits, thermal management and electronic packaging, signal processing and imaging, as well as radar, acoustics and Microwave system engineering. In its entirety the event includes a technical program, industry exhibits, and guest presentations from global experts on recent academic and industry advancements.

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You can find the most accessed T-CPMT articles on Xplore here