Title: Avoiding Inelastic Strains in Solder Joint Interconnections of IC Packages
Date: May 19, 2021
Time: 2:30 – 4:00 PM EDT/ 11:30 AM – 1:00 PM PDT
Abstract: The following three practically important questions associated with predicting and improving the reliability of solder joint interconnections (SJI) of IC packages are addressed: 1) Could inelastic strains in the solder material be avoided by a rational design, and if not, could the sizes of the inelastic strain areas be predicted and , if possible, minimized? 2) Considering that the difference between an highly reliable and an insufficiently reliable product is “merely” in the level of its never-zero probability of failure, and that SJIs are usually the most vulnerable structural elements in an IC package design, could this probability be assessed at the design stage and, if possible, made adequate for the given application? 3) Should temperature cycling accelerated testing for SJIs be replaced with a more physically meaningful, less costly, less time- and labor- consuming and, most importantly, less misleading accelerated test vehicle? The general concepts are illustrated by practical numerical examples.