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Term 1 January 2022 through 31 December 2025


The EPS Board of Governors (BoG) includes 19 Members-at-Large, elected by the full voting membership of the Society. Six Members at Large will be selected each year to represent the regional composition of the Society membership.

Regional Members-at-Large are elected to achieve totals proportionate to the geographic distribution of EPS members. Any IEEE Region/grouping of Regions determined to have at least 10% of total EPS members will have the proportional number of Member-at-Large positions designated to it for representation on the BoG.  The slate of candidates for each year’s election will be constructed to ensure that the resulting total of newly elected Members-at-Large and continuing Members-at-Large, respectively, has the proper proportion of representatives from each Region/grouping of Regions. Each Region/grouping of Regions will have a separate slate of candidates from that Region. Voting members will elect members-at-large from within their Region only (that is, members in Regions 1-7 & 9 vote for Members-at-Large from Regions 1-7 & 9, members in Region 10 vote for Members-at-Large from Region 10).

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Nomination Form

The EPS Technical Committee meetings to be held during ECTC 2022 are as scheduled.

Attendance is open to all.

 Technical Committee                  Date                    Time                                 Room

EPS High Density Substrates &    6/1/2022            7:00 am – 8:00 am           511

Boards TC

EPS Power & Energy TC            6/1/2022            7:00 am – 8:00 am           514

EDMS TC                                    6/1/2022            7:00 am – 8:00am            Driftwood 1

Reliability TC                               6/1/2022            7:00 am – 8:00am            Driftwood 2 

3D TSV TC                                  6/1/2022            7:00 am – 8:00am            411 - 415

Nanotechnology TC                    6/2/2022            7:00 am - 8:00 am            511

Materials & Processing TC         6//2022              7:00 am – 8:00 am           514

Emerging Tech TC                      6/2/2022            7:00 am – 8:00am            Driftwood 1

Photonics TC                              6/2/2022            7:00 am – 8:00am            Driftwood 2

EPS RF & Thz Techn. TC/             6/3/2022            7:00 am – 8:00am           514 

ECTC Components Committee   

11th IEEE CPMT Symposium Japan (ICSJ 2022)
“Electronics Packaging meets DX”
- Heterogeneous Integration for the next Wellbeing & Sustainability

The 11th IEEE CPMT Symposium Japan (ICSJ 2022) organizing committee is seeking abstracts for the upcoming event to be held November 9 -11, 2022 in Kyoto, Japan.

Authors are invited to submit a PDF file which includes ”500-word abstract” and figures through our website
The deadline for Abstract Submissions is May 29, 2022.

ICSJ is one of the most widely recognized international conferences sponsored by the IEEE Electronics Packaging Society (EPS) and has been held annually in Kyoto in November. This conference was inaugurated in 1992 as “The VLSI Packaging Workshop in Japan (VPWJ)” to provide a platform for participants to communicate and interact with global leaders in packaging technology. Later in 2010, this conference was renamed to “ICSJ” and ICSJ2022 is the 11th. ICSJ meeting, or 20th. conference since establishing VPWJ.

Even still vague situation with COVID19, following the last year, ICSJ2022 will be a hybrid event of on-site and virtual meetings where several presentation options are available for the authors to select and the details will be announced on the official website at a later date.

For more information

 For information on the paper submission Click here

Please note that the abstract submission deadline: 24th June, 2022

IMPACT 2022 Conference, which is organized by IEEE-EPS-Taipei, iMAPS-Taiwan, ITRI, and TPCA, is the largest gathering of PCB and packaging professionals in Taiwan. This year will be held on Oct. 26th -28th at Taipei Nangang Exhibition Center, in conjunction with TPCA Show 2022. For grasping the latest trend, the symposium highlights the theme “IMPACT on Empowered Edge Computing", which will explore the latest advances, challenges, and hot topics relevant to advanced research in packaging and PCB field.     

 Edge computing is the unique, distributed computing architecture that brings data storage and computation closer to the data source, which helps to reduce bandwidth usage and latency. Therefore, edge tech plays a crucial role in supporting Internet-of-Things (loT), artificial intelligence (AI), autonomous vehicles, smart healthcare and intelligent cities into practice.

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Zhaoxi Yao
F. Patrick McCluskey


 The global focus on reduction of CO2 emissions and sustainable development is driving the transition to hybrid and electric propulsion. While greater attention has been captured by land vehicles, the aviation community, including the U.S. Air Force, NASA and Boeing, has been conducting research on more electric aircraft (MEA), more electric engine (MEE) and electric propulsion for years. Some low-power, low-range fully electric aircraft with limited loading capacity have been developed already, dedicated to the flight training market, electric short take-off and landing (eSTOL) or electric vertical take-off and landing (eVTOL) short range transportation, and also serving as early steps towards larger scale developments.

Compared to traditional combustion engines, a major advantage for electric propulsion is the significantly higher efficiency, which can easily surpass 90%, while combustion engines can only reach about 60%. 

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Lei Shan

Ampere Computing, Santa Clara, CA




As on-chip performance scaling slows down due to semiconductor manufacturing technology and yield limitations, in-package system integration combining with the concept of “chiplet” becomes a widely adopted solution especially with the growth of system functionality and heterogeneous architectures. Accompanied with this emerging trend, various interconnect standards are being developed to meet the demands of high I/O bandwidth with low-power and low-latency, so that system performance shall not be compromised while cost is significantly reduced by “reassembling” chiplets into an equivalent gigantic monolithic silicon chip. 

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The grade of Senior Member is the highest for which application may be made and requires experience reflecting professional maturity.

IEEE members can self-nominate, or be nominated, for Senior Memberership.

To be eligible for application or nomination, candidates must:

  • Be engineers, scientists, educators, technical executives, or originators in IEEE-designated fields
  • Have experience reflecting professional maturity
  • Have been in professional practice for at least ten years (with some credit for certain degrees)
  • Show significant performance over a period of at least five of their years in professional practice

Review complete Senior membership requirement

Learn more about becoming a Senior Member

You can find the most accessed T-CPMT articles on Xplore here