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Description: This award recognizes the best "Vision of the Future of Electronics Packaging" abstract, to be presented at the IEEE Electronic Components and Technology Conference (ECTC) during the Tuesday evening panel session. The winner will present their abstract at the IEEE Electronic Components and Technology Conference (ECTC) during the Tuesday evening panel session. 

Presented to: An individual or a team of not more than three. 


Prize: Up to three awards will be provided to an individual or team. The prize will be $500 for each winner (if one of the winners is a team, $500 will be awarded to each member of the team). Travel grants will be provided to attend ECTC, and applied toward actual travel expenses including airfare, hotel and meals. Up to $1,000 for US based winners and up to $1,500 for Non US winners. Proof of travel expenses including receipts will need to be submitted for the reimbursements to be dispersed. Travel funding can be used for an individual or shared among the team (Total funding $1,000 per US team; Total funding $1,500 per Non US team). 


Eligibility: All ECTC and ITherm attedees. Winners are required to present their packaging visions at the ECTC Tuesday evening Panel Session. 


Basis for Judging: Judges will be selected members of the EPS Emerging Technology Technical Committee, the EPS VP-Technology, and the EPS President as an ex-officio member. Submissions are judged based on technical innovation, merit, originality, relevance and potential impact on the electronics packaging field. If no submissions are deemed to be of prize quality, an award will not be granted. 


Presentation: The award will be presented at the EPS luncheon held during IEEE Electronic Components and Technology Conference (ECTC). 


Deadline for Abstract Submission: February 18, 2019 


Submit an Abstract 



Presenter: Dr. Ning-Cheng Lee

Date: November 20, 2018

Time: 11:00 AM EST

Register Here

Earn 1 Professional Development Hour (PDH) for completing the webinar - Complete Form

Abstract: This course covers the detailed material considerations required for achieving high reliability for lead-free solder joints. The reliability discussed includes joint mechanical properties, development of type and extent of intermetallic compounds (IMC) under a variety of material combinations and aging conditions and how those IMCs affect the reliability. The failure modes, thermal cycling reliability, and fragility of solder joints as a function of material combination, thermal history, and stress history will be addressed in details, and novel alloys with high reliability will be presented.  The emphasis of this course is placed on the understanding of how the various factors contributing to the failure modes, and how to select proper solder alloys and surface finishes for achieving high reliability.

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Presenter: Darvin Edwards

Date: November 29, 2018

Time: 11:00 AM EST

Register Here 

Earn 1 Professional Development Hour (PDH) for completing the webinar - Complete Form

Abstract:  Through Silicon Via (TSV) and Fan Out Wafer Level Packages (FOWLP) are two of the most rapidly growing package technologies in today’s semiconductor industry.  These package technologies borrow from past packaging processes with many novel additional improvements and refinements to meet the new application needs.  New or refined wafer fab and package processes include deep TSV drilling, TSV plating, wafer thinning, backside interconnect fabrication, thermo-compression Cu pillar bonding, capillary and molded underfilling, over molding, temporary carrier attach, and thin die pick-and-place among many others.  As with any new package technology, reliability risks must be evaluated with special emphasis on failure mechanisms that might arise from the new package configurations and applications.  The package design and process development engineer must understand the factors that play into new technology reliability failure mechanisms, as well as mitigations that can be employed to ensure that highly reliable products can be produced.  Without this knowledge, reliability failures are bound to occur.

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The EPS Awards Program recognizes contributions to the profession, industry and the Society through a comprehensive set of awards and recognitions.

A series of EPS Major Awards, recognizing technical contributions and service, is administered by the EPS Awards Committee:

·       Outstanding Sustained Technical Contribution Award
·       Electronics Manufacturing Technology Award
·       David Feldman Outstanding Contribution Award
·       Exceptional Technical Achievement Award
·       Outstanding Young Engineer Award

Nomination Period September 15, 2018 - January 21, 2019
Nomination Form

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Description/ObjectiveTo promote, recognize, and support PhD level study and research within the Electronics Packaging Society’s field of interest. 

Prize: A plaque and a single annual award of US$5,000, applicable towards the student’s research.

Eligibility:Candidate must be an IEEE EPS member, at the time of nomination, and be pursuing a doctorate degree within the EPS field of interest on a full-time basis from an accredited graduate school or institution. The candidate must have studied with her/his advisor for at least 1 year, at the time of nomination, to be eligible. A Student who received a Fellowship award from another IEEE Society, within the same year, or is a previous EPS Fellowship
winner is ineligible.  

Nomination Period September 15, 2018 - January 21, 2019  

Nomination Form 

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Right now, blockchain is helping reshape industries in domains as varied as finance, healthcare, energy, supply chain and Internet of Things (IoT). As the technology continues to evolve, engineers moving into management roles are expected to be up to speed with market developments.

Given the demand from engineers for professional development that helps smooth their upward career path, IEEE is offering a live, virtual event–Advanced Blockchain for Enterprise–on 4 December 2018 - 5 December 2018 12:00PM-1:00PM ET daily.

Over the course of these two 1-hour sessions, attendees will gain a deeper understanding of recent enterprise-level innovations powered by blockchain plus much more:

●     Discover key differences between permissioned blockchain for business and public applications like Bitcoin

●     Learn which government policies and regulations will have a significant influence over blockchain’s global growth

●     Hear how businesses and industries can collaborate to reinvent themselves in the age of blockchain 

REGISTER HERE to receive the EPS partner discount or use code 18ABEPS at checkout.

Upon successful completion of the post-event assessment, attendees will earn a digital certificate from IEEE along with 0.2 Continuing Education Credits (CEUs) / 2 Professional Development Hours (PDHs).

Advanced Blockchain for Enterprise  will be presented by corporate blockchain strategist and MIT lecturer, Steve Derezinski.  Steve Derezinski consults with major corporations on blockchain strategy and new blockchain ventures. He taught Blockchain Ventures at MIT Media Lab and Babson College, and sits on a number of boards and funding panels. He is an expert reviewer for a Federal Agency’s Blockchain Funding and a subject matter expert for large philanthropic foundations in the USA and EU. He holds a BS from MIT and MBA from MIT Sloan.


 A Premier International Conference on Advanced and Emerging Issues in Microsystems, Packaging, Assembly, and Circuit Technology

IMPACT is jointly organized by IEEE EPS, iMAPS-Taiwan, ITRI and TPCA and collaborates with international organizations such as ICEP, JIEP (Japan), and iNEMI (U.S.A.). Over the course of the last several years, the conference has become a top tier conference in Asia - collecting 192 papers and attracting 593 attendees from 18 different countries; it has become a remarkable platform showcasing the latest technology research capability.

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SIITME provides an international forum for dissemination of information and scientific results relating to education, research and development activities. This conference is a premier European forum for the exchange of information between experienced scientists and academic communities within electronic industries. There is a unique combination of oral and poster presentations as well as individual meetings where researchers can come together to discuss scientific problems and organize international cooperation in a convenient atmosphere during the three-day conference.   

SIITME 2018 was a SUCCESS!!!

Workshop Overview

154 participants from 9 countries

6 Keynote speakers (2 – Germany and 4 -- United States)

IEEE members 39

10 companies were exhibitors

95 conference presentations

2 workshops focused on: human resource issues and, reliability aspects on design and manufacturing electronic products



It was poetically fitting that the IEMT Conference of 2018 was held in the Historic City of Melaka, having successfully made its presence felt in the other Historic City of Georgetown in 2016. Having hosted the event in 2010, Melaka embraced its Prodigal Conference’s return with open arms, welcoming delegates from around the world once again in what has become the flagship conference of IEEE Santa Clara.

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