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photo b chen


Fellow of ASE Group
Sunnyvale, California, USA 

“For contributions to electronic packaging from research and development through industrialization, and for his leadership in strategic roadmapping efforts.”

The prestigious award will be presented to Dr. Chen at the 68th ECTC in San Diego, CA 

EPS/EDS/Reliability Chapter Workshop 
9th Annual IEEE Soft Error Rate (SER) Workshop 
    -- tutorials, alpha upset, materials selection, process control, case studies ... 
    -- Co-sponsored by: Electron Devices and Reliability Society Chapters 
    -- Tues, Nov 7, no cost, worldwide via WebEx (also at Xilinx, San Jose - includes lunch)

This full-day Workshop addresses alpha-induced soft errors in computers, routers, memory, etc, and offers simultaneous on-site and remote participation for presentations and interactive discussions on a variety of critical subjects on SER for an ever-increasing international audience. For this year's event, we have invited two industry experts in the field to offer tutorials on fundamentals of soft errors and their impact on applications, as well as experimental approaches.  Log in for the full Workshop, or only the presentations that are useful to you.

(all times are USA Pacific Time)
  8:30 AM: Introduction 
Two morning tutorials: 
  8:45 AM: Tutorial: "Single Event Effects" (Austin Lesea, Xilinx)
  9:25 AM: Tutorial: "Probability and Statistics for Experimenters" (Gary Swift, Swift Engineering)
Talk Titles: 
  10:00 AM: "Study of the Alpha Counts from Solder Bump Material at Elevated Temperature and Introduction of Advanced-Grade Material" (Hirotaka Hirano, Mitsubishi Materials) 
  10:45 AM: “Assessment of Alpha Particle Susceptibility of Product Chips Through Accelerated Tests” (Paul Muller, IBM)
  11:25 AM: "Opportunities at the Stanford Underground Research Facility" (Jaret Heise, Stanford Underground Research Facility) 
  12:00 noon: Lunch (provided) 
  1:00 PM: "Practical Aspects of Realtime Testing" (Jeff Barton and Eric Crabill, Xilinx)
  1:45 PM: "New High Energy Neutron Spallation Beam, ChipIr at Appleton-Reutherford Lab at Oxford" (Francis Classe, Cypress) 
  2:25 PM: "On the Efficacy of Using Proton Beams For Estimating Neutron-Induced Soft Error Rates" (Norbert Seifert, Intel) 
  3:15 PM: Closing and Dismissal 
Registration is now open, and there is no cost -- sign up for either on-site participation, or attending via WebEx


The UCLA Center for Heterogeneous Integration and Performance Scaling is pleased to announce the 2nd UCLA CHIPS Workshop held at the UCLA Campus on Wednesday, November 1, 2017. Please Read More to view the full agenda.

Brest, France
Abstract Submission Date: Jan 19, 2018
May 22, 2018 - May 25, 2018
Dresden, Germany
Abstract Submission Date: Jan 31, 2018
Sep 18, 2018 - Sep 21, 2018
Albuquerque, NM USA
Abstract Submission Date: Feb 5, 2018
Oct 14, 2018 - Oct 18, 2018

The multi-billion dollar microelectronics industry is fundamentally dependent on the manufacture of semiconductor integrated circuits.  IEEE Transactions on Semiconductor Manufacturing (TSM) is devoted to exploring all issues related to high-volume integrated circuit (IC) production, including cost, cycle time, equipment utilization, yield, operations management, automation, and environmental impact.  As a result, this journal plays a critical role in serving the IC industry through the dissemination of information which provides solutions and approaches to optimizing these variables.