Co-design and Co-analysis of 3D Integrated Electronics
Rohit Sharma1, Jose E. Schutt-Aine2, Wiren Dale Becker3
1 Department of Electrical Engineering, Indian Institute of Technology Ropar, Rupnagar, INDIA
2 Department of Electrical and Computer Engineering. University of Illinois Urbana-Champaign Urbana, IL 61801, USA
3 IBM, Poughkeepsie, NY, USA
rohit@iitrpr.ac.in; jesa@illinois.edu; wbecker@us.ibm.com
Abstract
In this paper, we present an overview of the electrical-thermal co-design and co-analysis of 3D ICs in heterogeneously integrated systems. We present the generalized framework for electrical-thermal co-design. The application of electrical-thermal co-design and co-analysis as applied to chiplets is addressed.