Power Supply Stabilization by Embedded Film Capacitor Substrate and 2nd level Connection Method for Large Size Package

I. INTRODUCTION

There are two problems in the enlargement of the High-performance CPU/ASIC package. One is the power consumption increasing of Hi-performance chips mounted on packages. Second is the assembly yield and reliability of the 2nd level connection such as BGA or LGA socket. While a large power consumption requires stable power supply to the LSI, the allowable margin decreases and becomes difficult as the clock frequency increase and the driving voltage decreases. Therefore, the low impedance of the power supply in the package substrate is one of the important issues for improving power integrity. We solved this problem by embedded thin film capacitor technique in the package substrate.

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