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Andy Mackie

Indium Corporation

amackie@indium.com

INTRODUCTION 

The removal of heat from electronics—digital, analog, and for power management and control—to a final heat sink is becoming increasingly important as power densities (Watts (W) per unit volume or W per unit area) rise [1] and stacked (3D) logic and memory devices become increasingly common [2].

LOGIC MODULES

Logic devices (central processing units (CPUs) and graphics processor units (GPUs)) operate with much higher clock speeds, at greater efficiency, and have higher reliability when operating at lower temperatures [3], [4]. For digital electronics, the scaling efficiencies of power usage with reduced transistor size are noted to have hit an inflection point at the 7nm node for GPU architectures [5]. As nodes shrink below 7nm, power density increases, and the die will operate at higher temperatures unless steps are taken to remove heat from the chip. At the system design level, a typical goal is to have the die operating at a specific speed and overall system TDP (total design power) with the maximum transistor junction temperature (TjMAX) typical of a much lower TDP. The only means to achieve this is by removing heat more efficiently.

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