PhD Fellowship

2023 Award Nomination Period Is Now Closed

Description/Objective

To promote, recognize, and support PhD level study and research within the Electronics Packaging Society’s field of interest.

Prize

A certificate and a single annual award of US$5,000, applicable towards the student’s research.

Eligibility

Candidate must be an IEEE EPS member, at the time of nomination, and be pursuing a doctorate degree within the EPS field of interest on a full-time basis from an accredited graduate school or institution. The candidate must have studied with her/his advisor for at least 1 year, at the time of nomination, to be eligible.

A Student who received a Fellowship award from another IEEE Society, within the same year, or is a previous EPS Fellowship winner is ineligible.

Schedule

On-Line application available by September
Complete application packages are due by February 17, 2023
Formal award presentations will take place at the IEEE EPS luncheon at ECTC at the end of May.
Monetary awards will be given by June 15 (or at ECTC)

Selection/Basis for Judging:

Demonstration of his/her significant ability to perform independent research in the fields of electronic packaging and a proven history of academic excellence, as documented in:

Nominator must be of IEEE EPS Member grade or higher. Only one nomination per member per year. Self nominations are not allowed.
Two-page (maximum) statement by the student describing his or her education and
Research interests, accomplishments, and impact on the electronics package industry.
Proof of contributions to the community may consist of open literature publications (preferred) such as papers, patents, books, and conference presentations and reports (available to the public).
At least one letter of recommendation from someone familiar with the student’s work
A minimum of 1 endorsement is requested. (Endorsers do not need to be current EPS members)
Student resume

2023 RECIPIENT

Yousef Safari

McGill University, Canada

For contribution to large-scale heterogeneous integration, specifically, formulation of scalable methodologies and architectures, and development of EDA tools for optimization of power delivery, thermal management, and hardware security in high-performance wafer-scale chiplet-based platforms and 3D-ICs.

PAST RECIPIENTS

2022 - Peng Zhao

For contributions to 3D packaging of trapped ion devices for application in quantum information processing.

2021 - Abishek Deshpande

For his contributions in the development of multiaxial microscale solder joint test specimens and cyclic test setups for demonstrating the differences in solder joint vulnerability to tensile fatigue vs. shear fatigue.

2020 - Siddarth Ravichandran

For contributions to the development 2.5D and 3D Glass Packages for Heterogeneous Integration in High Performance Computing.

2019 - SivaChandra Jangam

For contributions to the development of the Silicon Interconnect Fabric as a platform for the fine pitch integration of heterogeneous dielets and the associated signaling protocol.