30 Years of Promoting Electronic Packaging PCB Education and Training Topics In Romania
Three decades ago, the Tehnici de Interconectare in Electronica- Interconnection Techniques for Electronics (TIE) program (www.tie.ro) was launched at the University Politehnica of Bucharest, Romania, a program that today has expanded to all universities in Romania with departments that educate and train future engineers for the electronics industry. In those early years all TIE activities were conducted in the Romanian language.
What’s Driving Substrate Shortages?
E. Jan Vardaman, President and Founder, TechSearch International, Inc.
Unexpected demand, global supply chain uncertainty, accidents, and weather-related events have resulted in semiconductor shortages. All types of substrates are in short supply; including substrates for chip scale packages (CSPs) and flip chip ball grid arrays (FC-BGAs). Despite some capacity expansion over the next few years, and new plants planned to come online in 2024-25, the situation is not expected to improve for at least two to three years. Some companies are considering substitutes that do not use substrates, including fan-out wafer level packages (FO-WLPs). Layer count reduction in substrate designs with the adoption of RDL is also under consideration.
ESTC 2022 Call for Papers
The Electronics System-Integration Technology Conference (ESTC) is the premier international event in the field of electronics packaging and system integration. The conference is organized every two years in Europe and is supported by IEEE-EPS in association with IMAPS-Europe. The 9th ESTC will be taking place in Sibiu, Romania. Placed in the middle of Romania, surrounded by the the high Carpathian Mountains and Cibin river, Sibiu is a citadel of the European electronics industry and represents a place where culture, landscape, gastronomy and profession merge in a friendly pleasant environment.
The ESTC 2022 seeks original, noncommercial papers describing research and innovations in all areas of electronics packaging and system integration. Authors are invited to submit an abstract describing recent work. Abstracts must detail the objectives of the work presented and demonstrate new results.
Symposium on Reliability for Electronics and Photonics Packaging
Symposium on Reliability for Electronics and Photonics Packaging (IEEE- REPP) : Register NOW
As the organizing team, we are excited to invite you to register for the EPS second symposium of REPP. It features eminent Plenary talks , invited talks and presentations in the evolving and exciting field of Electronics and Photonics packaging and the program details can be reviewed through this link.
This 2-day virtual event will focus on quantified reliability, accelerated testing and probabilistic assessments of the useful lifetime of electronic and photonic assemblies, packages and systems. This includes failure modes, mechanisms, design, simulation and accelerated testing.
Kindly sign up for our Dlist herefor continuing updates.
Dates: Nov. 11-12th, 2021
Location: Online event, links to the event will be sent after registration.
From The Organizing Committee
IEEE Educational Activities Newsletter
Celebrating IEEE Day, Special offer on continuing education courses, upcoming virtual events, and more!
