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The EPS proudly congratulates the latest recipients of the IEEE Certificate of Distinguished Achievement for Technical Leadership and Expertise:

Mukta Farooq, IBM

John Lau, Unimicron Technology Corporation

E. Jan Vardaman, TechSearch International, Inc. 

The next round of nominations will open soon. More details can be found here.

Title: Advanced Power Electronics for Electric-Drive Mobility Applications

Date: Wednesday, August 30th, 2023

Time: 1.00 pm - 2.00 pm, CST

Where: Microsoft Teams Meeting

Speaker: Dr. Sreekant Narumanchi, National Renewable Energy Laboratory (NREL)

Abstract: Electronics, power electronics, and electric machines are becoming important for an array of mobility/transportation, renewable energy, and energy efficiency applications. In this presentation, I will provide an introduction to NREL and my group. Then, I will describe some challenges and opportunities for power electronics, electric machines, and electric traction drive systems for mobility applications in particular. After that, I will give an overview of my group’s research activities in power electronics. The first area covered in detail will be power electronics thermal management with water-ethylene glycol and dielectric fluids in the single-phase liquid regime and dielectric fluids/refrigerants in the two-phase/boiling regime. The second area will be power electronics materials and bonded interfaces including efforts on sintered silver, sintered copper, polyamide- and polyimide-based bonded interface materials, and polyimide-based electrically insulating materials. Third, efforts on some advanced power electronics packaging concepts will be introduced.

Join meeting here

Additonal meeting details

Title: Considerations for thermal and reliability performance of cooling solutions utilizing Phase-Change Materials 

Date: September 12, 2023

Time: 12:00 p.m. - 1:00 p.m (Eastern Time US & Canada)

Where: Webex

Speaker: David Huitink, PhD., University of Arkansas

Abstract: Phase change materials offer the opportunity to passively absorb energy through latent heat exchange during phase transitions, which makes them a prospective solution for temperature management in electronics. This webinar will introduce the topic of phase change materials, their key properties, and how their performance may benefit the thermomechanical reliability in electronic assemblies. The discussion will familiarize participants with the key considerations of where these materials have greatest benefit, and illustrate the importance of optimal placement, properties, and operating conditions in leveraging the benefits of latent heat exchange.

Bio: Professor Huitink's research portfolio spans the intersection of materials and thermal sciences, where fundamental thermophysical material behaviors can be leveraged for engineered applications. Herein, the interplay between atomic bonding, polymorphism, & nanoscale interactions with thermal transport, generation and storage have important implications in energy sciences, thermally active and functional materials, and materials processing. In particular, the Huitink lab works toward developing next generation, high density power electronics for electrified transportation and power conversion systems, and leverages advances in materials and thermal technologies for enabling High-Reliability electronics packaging. Moreover, the reliability efforts include developing novel methods for observing and isolating the physical mechanisms behind material degradation and failure in materials used in high power, high voltage electronic assemblies.

Prior to joining Academia, Professor Huitink spent more than 5 years in industry, working in microelectronics technology development and manufacturing at Intel Corporation, where he served as Quality & Reliability Engineering Program Manager for Intel's Custom Foundry Division. There he pioneered the development of advanced methods of predicting reliability of silicon-based flip chip microelectronic packages, as well as developed testing protocols and FEA methods for governing Design for Reliability (DfR) guidance. Prior to his industry experience, Dr. Huitink received his PhD in Mechanical Engineering from Texas A&M University as a NSF Graduate Research Fellow, working on complex nano-scale interactions at material interfaces under chemical and mechanical influence

Register here

 

Binghamton University, GE Global Research and IBM Research are proud to host the 34th Annual Electronics Packaging Symposium — Small Systems Integration. The program will include two days of exciting invited presentations with a focus on supply chain interconnectivity. The theme this year is Packaging for AI and Workforce Development.

We invite you to join us for this in-person event on Sept. 7-8, 2022, at the Albany NanoTech Complex, Albany, NY.

Registration closes  August 23, 2023. 

Register here

Agenda

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The IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) Symposium is the premier international conference in Asia-Pacific region to share the recent progress of design, modeling, simulation and measurement related to the electrical issues arising at the chip, package and system levels. Covering the paper presentations, industry exhibitions, workshops and tutorials, EDAPS 2023 will be held in the paradise island of Mauritius, December 12-14, 2023. For further information, please visit the website at edaps.org.

Important  Dates

Manuscript Submission Deadline:  September 12th, 2023

Notification of Acceptance: October 12th, 2023

Conference Date: December 12th-14th, 2023

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The timeline for the IEEE Transactions on Components, Packaging, and Manufacturing Technology (T-CPMT) Call for Papers for the Special Section focused on multi-physics aspects of packaging of power electronics at the die/chip, module and converter scales has been extended.  

Call for Papers: April 30, 2023

Draft Manuscripts due: October 15, 2023

Submission of Final Manuscripts and CopyRight Forms: March 15, 2024

Publication: April, 2024 

Authors should select "Special Section on Power Electronics" when submitting their papers and note in their cover letter that the manuscript is being submitted for the Special Section on Power Electronics Packaging. This will ensure that the manuscript is assigned correctly.

The IEEE T-CPMT is a flagship journal focused on advancing the knowledge and dissemination of research on multiple electronics packaging technologies.

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Nir Sever, Sr. Director, Business Development

proteanTecs, 36 Kdoshei Bagdad St., Haifa 33032, Israel; nir.sever@proteanTecs.com

Abstract

For decades, Automotive Electronics were based on semiconductors manufactured on mature and stable process technologies. Designs were well characterized for robustness; tight screening at the production line enforced quality; using industry-standard test methodologies such as JEDEC JESD22 and JESD47 [1] assured reliability. Functional Safety (FuSa) relies on monitoring software, system redundancy, and safety protocols. Today, Electric Vehicles (EV) and Autonomous Driving (ADAS) require using the most advanced semiconductor technologies. Reliability requirements exceed those commonly used for commercial applications, device screening becomes a challenge, and safety measures that take effect after an error has already occurred may be insufficient.

Recently, chiplet [2] based designs are driving the most advanced semiconductors for High-Performance Computing (HPC) and AI. Is chiplet-based design ready to be adopted by the Automotive industry?

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Sandeep Razdan1 , Matt Traverso, and Anthony Torza, Cisco Systems, Inc.

1 Senior Member IEEE

Abstract

Co-packaged Optics (CPO) is an emerging technology that integrates high bandwidth optical engines next to a compute chip on the same substrate. The technology’s key advantage lies in the ability to provide high bandwidth [1, 10] and lower latency [18] while reducing overall system power consumption compared to traditional pluggable optical transceivers [1]. By leveraging silicon photonicsbased optical engines, CPO achieves high level of optical and electrical device integration, using proven semiconductor fabrication technologies and design processes, thereby achieving scale, reliability, and cost reduction. However, critical challenges in assembly, optical coupling, mechanical and thermal design must be addressed to ensure reliable and scalable manufacturing. Demonstrating long term reliability, serviceability and interoperability are critical to wide scale adoption and deployment of CPO in hyperscale networks and high-performance computing applications. 

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You can find the most accessed T-CPMT articles on Xplore here

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