Registration Now Open for IWIPP 2022
International Workshop on Integrated Power Packaging (IWIPP 2022)
Registration is now open for IWIPP 2022, a PSMA and IEEE sponsored hybrid workshop. The event will be held August 24-26, 2022, at the World Trade Center in Grenoble, France, and hosted by G2Elab. IWIPP is a growing and successful power technology workshop with excellent speakers and networking opportunities.
Upcoming Chiplet Webinar
Title: Chiplet Design and Heterogeneous Integration Packaging
Presenter: John Lau
Date: July 5, 2022
Time: 8:00 AM EDT
Abstract:
In this lecture, chiplet design and heterogeneous integration packaging are defined. Examples such as those given by Xilinx, AMD, Intel, TSMC, and Samsung will be presented and discussed. The lateral communication between chiplets such as the silicon bridges embedded in organic build-up package substrate and fan-out epoxy molding compound as well as flexible bridges will be presented. UCIe (universal chiplet interconnect express) will also be updated. Key enabling technologies such as thermocompression bonding and hybrid bonding will be briefly mentioned. The trends and challenges (opportunities) of chiplet design and heterogeneous integration packaging will be discussed.
Additively Manufactured Highly Integrated mm-Wave Packaging Structures
Abstract —Modern 5G, Internet of Things (IoT), and wearable devices require tons of features packed into a small, portable form factor. This brings significant challenges to both the design of the packaging and the manufacturing of the device. This is where additive manufacturing (AM) can play a critical role. AM is a technology which can deposit various of materials in both 2D and 3D manner to realize complex geometries with superior resolution, accuracy, and speed. Compared to traditional subtractive manufacturing methods such as milling and chemical etching, AM techniques only use the minimum amount of materials which can reduce the cost significantly, making it the ideal candidate for future “smart city” that promises to connect billions of devices in all different types of environments. AM also enables novel integration of structures that are un-realizable with traditional manufacturing techniques. With AM, fully featured electronic devices can be realized in a customized 3D multi-layer stack within a single package. This paper gives a review of additively manufactured highly integrated packaging structures that operate at 5G mm-wave frequencies.
Universal Chiplet Interconnect Express (UCIe)®: An open standard for developing a successful chiplet ecosystem
I.INTRODUCTION
Universal Chiplet Interconnect Express (UCIe)® [1] is an open industry standard interconnect, offering high-bandwidth, low-latency, power-efficient, and cost-effective on-package connectivity between chiplets. It addresses the compute, memory, storage, and connectivity needs across the entire compute continuum, spanning cloud, edge, enterprise, 5G, automotive, high-performance computing, and hand-held segments. UCIe offers a plug-and-play interconnect at the package level, enabling a designer to package chiplets from different sources, including different fabs, using a wide range of packaging technologies.
Top T-CPMT Papers on Xplore
You can find the most accessed T-CPMT articles on Xplore here