Power Supply Stabilization by Embedded Film Capacitor Substrate and 2nd level Connection Method for Large Size Package
I. INTRODUCTION
There are two problems in the enlargement of the High-performance CPU/ASIC package. One is the power consumption increasing of Hi-performance chips mounted on packages. Second is the assembly yield and reliability of the 2nd level connection such as BGA or LGA socket. While a large power consumption requires stable power supply to the LSI, the allowable margin decreases and becomes difficult as the clock frequency increase and the driving voltage decreases. Therefore, the low impedance of the power supply in the package substrate is one of the important issues for improving power integrity. We solved this problem by embedded thin film capacitor technique in the package substrate.
Manufacturing Challenges for Large Substrates
Adoption of advanced packaging methods, such as 2.5D and chiplet based MCM assembly, combined with higher speed I/O, increasing I/O counts, and increasing product complexity have resulted in significant growth to FCBGA substrate size and complexity, which has strained the industry FCBGA substrate supply the last few years. Significant application drivers for increasing substrate complexity have been high performance computing (HPC, including server CPUs and AI accelerators), 5G base stations, and high-end networking. Substrate complexity requirements have increased with higher layer counts, reduced chip and package interconnect pitch, finer substrate line and space wiring, increased stacked via counts, higher package I/O requirements, and custom requirements such as embedded bridge diei or passive components.
ECTC Conference Leaders Through the Years
During the conference luncheon in June 2022, past general chairs of the ECTC conference gathered together for a memorial photo.
Thank you for your leadership! 
Standing left to right - Eric Perfecto '07, Mark Poliks '19, Henning Braunisch '17, Alan Huffman '16, Tom Reynolds '00,
Chris Bower '20, Torsten Wipiejewski '08,Patrick Thompson '06, Wolfgang Sauter '13 - '14
Sitting left to right - Dave McCann '12, Nancy Stoffel '21, Beth Keser '15, Rao Bonda '09
11th IEEE CPMT Symposium Japan (ICSJ2022)
IEEE ICSJ 2022 will be held at Kyoto, Japan from November 9 -11th, 2022.
ICSJ is one of the most widely recognized international conferences sponsored by the IEEE Electronics Packaging Society (EPS) and has been held annually in Kyoto in November. This conference was inaugurated in 1992 as "The VLSI Packaging Workshop in Japan (VPWJ)" to provide a platform for you to communicate and interact with global leaders in packaging technology. Later in 2010, this conference was renamed to "ICSJ" and ICSJ2022 is the 11th. ICSJ meeting, or 20th. conference since establishing VPWJ. Even still vague situation with COVID19, following the last year, ICSJ2022 will be a hybrid event of on-site and virtual meetings where several presentation options are available for the authors to select and the details will be announced on the official website at a later date.
The symposium tries to forecast where the packaging technology is heading. In 2022, our focus is on key electronics packaging technologies for the next-generation mobile networks and their applications for sustainable well-being for people and society, and emphasises on the following main topics: Photonics, Advanced Packaging, Process & Material, Power & Automotive Electronics, Bioelectronics & Healthcare, and Signal/Power Integrity.
Voting Now Open for EPS Members-At-Large Until 18 October, 2022
Election Principles
The EPS Board of Governors (BoG) includes 19 Members-at-Large, elected by the full voting membership of the Society. Six Members at Large will be selected each year to represent the regional composition of the Society membership and one Member at Large will be selected to represent the Young Professional community. A Young Professional is an individual that has completed their first academic degree within the last 15 years.
Regional Members-at-Large are elected to achieve totals proportionate to the geographic distribution of EPS members. Any IEEE Region/grouping of Regions determined to have at least 10% of total EPS members will have the proportional number of Member-at-Large positions designated to it for representation on the BoG. The slate of candidates for each year’s election will be constructed to ensure that the resulting total of newly elected Members-at-Large and continuing Members-at-Large, respectively, has the proper proportion of representatives from each Region/grouping of Regions. Each Region/grouping of Regions will have a separate slate of candidates from that Region. Voting members will elect members-at-large from within their Region only (that is, members in Region 8 vote for Members-at-Large from Region 8, members in Region 10 vote for Members-at-Large from Region 10; etc.). There is no election of a Young Professional this year.